Sigurthr
0
- Joined
- Dec 11, 2011
- Messages
- 4,364
- Points
- 83
Congratulations on first light! That is a milestone to enjoy. Now that you know your coil works in theory it is time to do some bulletproofing!
Now then; I am thinking that due to the use of a counterpoise you are getting capacitive coupling between secondary and primary which is causing dielectric breakdown between high side drain and gate as RF feeds back in to the high side fet. Either that or there was some physical touching of the gate resistor and the drain lead.
Run that long ground wire to a RF ground and ditch the counterpoise. I think at this point you've blown up more components than the spool of wire would have cost.
Increase the spacing between the pins of your fets by angling the gate pins about 45degrees outward off the left side of the fets. Do the same with the source pins out towards the right side of the fets. Lay the freewheeling diode parallel over the plane of the fet and make 90degree bends in the diode leads to interface it with the Drains and Sources. Do not use such thick wire terminations right at the body of the fets. I know you were aiming to keep inductance and resistance low by maximizing connection surface area, but keep in mind there is 1 to 2mm of pin length inside the plastic case of the fet that you cannot correct for. Yes it is ideal to minimize any unecessary additions to the length of thin conductor present, but another 2mm isn't going to cause the bridge to fail at TC frequencies. 2mm more spacing yeilds 2kV more voltage isolation. Leave 1 to 2mm of pin length between the body of the fet and the heavy gauge wire, and a cm or so of length on the freewheeling diodes won't hurt anything as this does not handle much current, it is only there to protect the fets from flyback voltage.
If you can, get some back to back zeners across gate and source of those fets! The two zener's anodes are connected together and one cathode goes to gate and the other to source. You want a low impedance disposable path for any spikes and short currents outside of your GDT. Every time the drain shorts to the gate you risk complet;y destroying your GDT. I don't know about you but I F^%$#ng hate winding toroids by hand. Lead lengths on the zeners are not critical, as they ideally will not carry any current.
Add a very sharp breakout point to the toroid.
Place a snubber capacitor (2x DC Bus voltage, 0.1 to 1uF, film, foil, or ceramic type capacitor) across the high side fet Drain and low side fet Source.
Here are some photos of my latest half bridge. This thing is SOLID. If I had a higher voltage bridge rectifier I could run it off a doubler easily. Runs for 10min at 2.2kW before getting hot to the touch with no fan. Get as much info out of the construction as you can, the only thing better than this design would be laminated bus with actual bus bars with the caps closer to the fets (tight bend radii of stranded 10ga is hard to do).
Now then; I am thinking that due to the use of a counterpoise you are getting capacitive coupling between secondary and primary which is causing dielectric breakdown between high side drain and gate as RF feeds back in to the high side fet. Either that or there was some physical touching of the gate resistor and the drain lead.
Run that long ground wire to a RF ground and ditch the counterpoise. I think at this point you've blown up more components than the spool of wire would have cost.
Increase the spacing between the pins of your fets by angling the gate pins about 45degrees outward off the left side of the fets. Do the same with the source pins out towards the right side of the fets. Lay the freewheeling diode parallel over the plane of the fet and make 90degree bends in the diode leads to interface it with the Drains and Sources. Do not use such thick wire terminations right at the body of the fets. I know you were aiming to keep inductance and resistance low by maximizing connection surface area, but keep in mind there is 1 to 2mm of pin length inside the plastic case of the fet that you cannot correct for. Yes it is ideal to minimize any unecessary additions to the length of thin conductor present, but another 2mm isn't going to cause the bridge to fail at TC frequencies. 2mm more spacing yeilds 2kV more voltage isolation. Leave 1 to 2mm of pin length between the body of the fet and the heavy gauge wire, and a cm or so of length on the freewheeling diodes won't hurt anything as this does not handle much current, it is only there to protect the fets from flyback voltage.
If you can, get some back to back zeners across gate and source of those fets! The two zener's anodes are connected together and one cathode goes to gate and the other to source. You want a low impedance disposable path for any spikes and short currents outside of your GDT. Every time the drain shorts to the gate you risk complet;y destroying your GDT. I don't know about you but I F^%$#ng hate winding toroids by hand. Lead lengths on the zeners are not critical, as they ideally will not carry any current.
Add a very sharp breakout point to the toroid.
Place a snubber capacitor (2x DC Bus voltage, 0.1 to 1uF, film, foil, or ceramic type capacitor) across the high side fet Drain and low side fet Source.
Here are some photos of my latest half bridge. This thing is SOLID. If I had a higher voltage bridge rectifier I could run it off a doubler easily. Runs for 10min at 2.2kW before getting hot to the touch with no fan. Get as much info out of the construction as you can, the only thing better than this design would be laminated bus with actual bus bars with the caps closer to the fets (tight bend radii of stranded 10ga is hard to do).
