Low voltage, HC driver for a coherent FAP module?

[farbe2]

You know, I am always concerned with modulation speed. That and current ripple is why I would want to go linear after switching.

CMC is a way but more complex to integrate but offers advantages, not sure if converters designed for CPUs and stuff like that offer direct CMC, most of them only offer external VMC with integrated CMC right?

5V vs 12V: makes sense, you might also need to go for thicker copper because of the high currents.

Good luck while testing! I really would like to see a thread if you ever get to it!

 

[paul1598419]

You know, I am always concerned with modulation speed. That and current ripple is why I would want to go linear after switching.

CMC is a way but more complex to integrate but offers advantages, not sure if converters designed for CPUs and stuff like that offer direct CMC, most of them only offer external VMC with integrated CMC right?

5V vs 12V: makes sense, you might also need to go for thicker copper because of the high currents.

Good luck while testing! I really would like to see a thread if you ever get to it!

The waste heat is not just a product of the current alone. It is the product of the voltage and current. Either way, 5 volts or 12 volts, your waste heat will be about the same as long as your output power is also the same.

 

[atomd]

You know, I am always concerned with modulation speed. That and current ripple is why I would want to go linear after switching.

CMC is a way but more complex to integrate but offers advantages, not sure if converters designed for CPUs and stuff like that offer direct CMC, most of them only offer external VMC with integrated CMC right?

5V vs 12V: makes sense, you might also need to go for thicker copper because of the high currents.

Good luck while testing! I really would like to see a thread if you ever get to it!

No clue about CPU but modern GPU converters are natively CMC with feedforward from clock scaling logic. Otherwise inductor current ramps down so much slower than consumed current that you need absurd capacitance (in dozen mF). So when you want to ramp down clock you actually first inform PDN to reduce current and only then reduce clock speed to burn through leftover energy in the inductors.

The waste heat is not just a product of the current alone. It is the product of the voltage and current. Either way, 5 volts or 12 volts, your waste heat will be about the same as long as your output power is also the same.

Wait what? Do you have like any clue about how electricity works?
Wasted power on traces is I^2R so to get same losses I'll need to make input tracks 5.8 times thicker (actually more like 5.6 as efficiency increases a bit). Then there are details regarding switch, inductor and frequency selection. In the end 5V SMPS is totally different than 12V one. Running on fewer phases and much lower frequencies.

 

[paul1598419]

Wait what? Do you have like any clue about how electricity works?
Wasted power on traces is I^2R so to get same losses I'll need to make input tracks 5.8 times thicker (actually more like 5.6 as efficiency increases a bit). Then there are details regarding switch, inductor and frequency selection. In the end 5V SMPS is totally different than 12V one. Running on fewer phases and much lower frequencies.

Yes, I have a BSEE. I wasn't talking about copper traces on your driver. I was talking about the diode's waste heat. Of course one would want a driver that is going to work properly and if your power is great enough, the traces are always something to keep in mind. P=I^2R is just another form of P=IE and E=IR.

 

[atomd]

Yes, I have a BSEE. I wasn't talking about copper traces on your driver. I was talking about the diode's waste heat. Of course one would want a driver that is going to work properly and if your power is great enough, the traces are always something to keep in mind. P=I^2R is just another form of P=IE and E=IR.

well clearly suipply voltage selection refers to driver's heat output, not LD heat output.

 

[paul1598419]

The supply is more than just driver heat. There are costs that need to be factored in and output power that will determine if the supply is robust enough to drive what you intend to drive.

 

[Arcygenical]

I wish I had a better understanding of electrical theory.

I tried building my own 0.1-50v PSU using a large array of TIP141's. While that worked great for CV output (and I could drive a VERY large dummy load), using an LM315 and "audio quality pot" on the input absolutely destroyed the granularity, making it unsuitable to power a FAP. Was wonderful for powering those "stage (25-50w" LEDs) ardound 4v+, but I didn't trust the design to go any lower.

Anyhoo,

Coherent is pretty adamant on <2.3v.

I got something very similar to this. Albeit, one that goes to 50a, for about 1/2 the cost.

Powers the 808nm FAP very well, and the module pushes SO much power into my nd:yv04 crystals, that I needed to cool the 808/1064nm dichro via tiny 5w TEC.

Just wanted to post, so anyone looking to power a FAP module has a decent solution.

 

[atomd]

That's not a decent solution. The current ripple on that thing is in order of 1-4A.

To be fair, you only need CV output for driving FAPs if you do it coherent way and keep temp within +-50mK

 

[CurtisOliver]

Also, if anyone's wondering WHY I need a 40w 808nm source, it's to pump into an optical train for 808>1064>532nm light, using some homegrown KDP crystals that I'm cutting and polishing myself.

808nm FAP : > MIRROR [T95% 808nm | R 99% 1064nm] > CRYSTAL [Nd:YVO4] > CRYSTAL [KTP to test, or KDP after proof of concept]

The basics of the optical train.

I love the idea of growing and utilising your own KDP. But I do have to ask. Do you know how to identify the c-axis of your crystal? How are you going to accurately cut the appropriate phase matching angle for your application at home? And polishing the crystal is easy work, but how will you get it optically flat? I'm not being difficult. But these are the things you will need to consider how to do in order to be successful. I have a raw blade of KDP at home and its not something I can just slap in front of a IR laser and expect to see SHG.

 

[atomd]

I saw people doing it outside the resonator with Q-switched lasers, but I have a hard time imagining doing it inside cavity.

Identifying axis is not that hard. KDP is birefringent, so can try aligning axis using polarized laser. You should also totally be able to slap raw slab of KDP in front of pulsed laser and rotate it until you get SHG. link

 

[kecked]

I saw a video on how they did quartz in the 50s. They dipped it in oil and looked through a polar scope. I’ve grown kdp and the quality isn’t good enough yes I got a few green flashes but nothing of quality. Buy a crystal.

 

[Arcygenical]

That's not a decent solution. The current ripple on that thing is in order of 1-4A.

To be fair, you only need CV output for driving FAPs if you do it coherent way and keep temp within +-50mK

@atomd

That's interesting. I can absolutely cool the module with a large TEC, and I've got tons of indium metal laying around for a good thermal interface... But +/- 0.050°C'? Is that really the temperature stability requirement for a FAP module in CV mode? Sounds EXPENSIVE to regulate without pushing the data into arduino with an expensive thermistor. Sigh.

But, I have measured voltage ripple of these supplies with an oscilloscope, across a test load and I don't get anywhere near that worst case scenario. Even from a "hard on" (aka, plugging the damn thing into the wall with no slow start, or pulling the power from mains for a "hard off" [just to make sure catastrophic failure doesn't allow any inductive collapse voltage spikes into the output VCC, these seem to be well snubbed]) it's nowhere near that. From that, I'm inferring the current ripple isn't anywhere near the 1-4a quoted. But I'm probably so wrong.

I plan to drive the module no further than 50% of it's rated If. I don't have good enough safety equipment to go beyond that, does that change the problems of current ripple, if I'm only giving the module half of it's If by varying voltage output.

Therefore, my question.

So, I'll defer to your expertise. What's the best way to measure current ripple. Preferably across a test load. I'm not an EE. Just a hobbyist. I have an oscilloscope, large array of silicon diodes for HV.

 

[Arcygenical]

How do you polish home grown crystals?

@atomd
Cut them flat using diamond Dremel bits. I had to 3D print a rig and motor setup to ensure the cuts were straight.

Using gloved hands, and wet/dry sandpaper, gently sand out their imperfections on the LONG sides of the newly formed crystals with 1000g wet/dry sandpaper attached to a flat glass surface (I use an old picture frame). The same way you'd lap a processor/heatsink for a computer. Use a USB microscope to ensure the surfaces are generally flat. Wash it gently in supercooled ethanol (99% ethanol as close to -10c as possible). Then move onto polishing.

Cerium oxide, used for polishing optics. Get the powder in different grits. I've got 5um, 1um and 0.5um. Suspend it in medical grade grapeseed oil. Polish it on a DIY "lapidary." Use pure ethanol (Methanol might work, never tried it) to dissolve the grapeseed oil after polishing, because KTP and KDP are poorly soluble in ice cold ethanol (but so is grapeseed or silicone oils, so you'll need to wash it a few times, they tend to gum up below freezing, obviously, since they're oils)​

​

I might post an imgur tutorial on how to make a DIY lapidary one day (if I do, I'll link you), but, ehhhhhh, I never took progress pics, and I'd want to make one that rotates slightly faster anyways.​

​

​

I love the idea of growing and utilising your own KDP. But I do have to ask. Do you know how to identify the c-axis of your crystal? How are you going to accurately cut the appropriate phase matching angle for your application at home? And polishing the crystal is easy work, but how will you get it optically flat? I'm not being difficult. But these are the things you will need to consider how to do in order to be successful. I have a raw blade of KDP at home and its not something I can just slap in front of a IR laser and expect to see SHG.

@CurtisOliver

Trial and error mainly.

I have a 5w 1064nm fiber source, so I'm going to pump it into a bunch of raw, optically clear crystals and see if I get any conversion. I bought about a kg of KDP online and purified it twice using recrystallization. I can grow many crystals and just try my luck.

I also have a bunch of verified KTP and LBO crystals in professional installations (mainly coherent brand crystals) to test my pump setups (1064 and 976nm) with, making sure I didn't get scammed on ebay with poorly labeled pump diodes, which would ruin my "trial and error" approach.

Again, this is just my nerdy hobby. I don't care if it works at all, it's just fun for me!

I have considerable lapidary experience with gemstones, so I'm confident I can get things optically flat.

 

[atomd]

@atomd

That's interesting. I can absolutely cool the module with a large TEC, and I've got tons of indium metal laying around for a good thermal interface... But +/- 0.050°C'? Is that really the temperature stability requirement for a FAP module in CV mode? Sounds EXPENSIVE to regulate without pushing the data into arduino with an expensive thermistor. Sigh.

But, I have measured voltage ripple of these supplies with an oscilloscope, across a test load and I don't get anywhere near that worst case scenario. Even from a "hard on" (aka, plugging the damn thing into the wall with no slow start, or pulling the power from mains for a "hard off" [just to make sure catastrophic failure doesn't allow any inductive collapse voltage spikes into the output VCC, these seem to be well snubbed]) it's nowhere near that. From that, I'm inferring the current ripple isn't anywhere near the 1-4a quoted. But I'm probably so wrong.

I plan to drive the module no further than 50% of it's rated If. I don't have good enough safety equipment to go beyond that, does that change the problems of current ripple, if I'm only giving the module half of it's If by varying voltage output.

Therefore, my question.

So, I'll defer to your expertise. What's the best way to measure current ripple. Preferably across a test load. I'm not an EE. Just a hobbyist. I have an oscilloscope, large array of silicon diodes for HV.

0.05C isn't that expensive in analog. Remember you don't need high precision not accuracy. It's actually far cheaper and simpler in analog than with arduino, just look at schematic of Verdi.

The best way to measure current ripple is with current probe. The other option is to insert a small resistor (1<mohm) in series with FAP and amplify it with some dufferential amplifier. The problem with resistive load is that it has too high dynamic resistance so most of the ripple flows into PSU caps.